Digital Fault Tolerance Engineer

🚨 We’re Hiring: DFT Engineer

📍 Location: Relocation to Singapore (Employment Pass provided)

📝 Employment Type: Full-time

🔎 Responsibilities

• Implement DFT logics including Scan Logic, IJTAG, MBIST, and Logic BIST.
• Improve testability of digital designs at both block and chip level.
• Apply DFT techniques for Digital and Mixed Signal IP.
• Perform ATPG pattern generation (SSA, Transition, Path Delay, IDDQ).

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• Conduct ATPG verification and simulation playback.
• Deliver high-quality ATE patterns for production testing.
• Support ATE engineering team during first proto bring-up and failure analysis.

📌 Requirements

• Minimum 3 years of relevant experience.

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• Bachelor’s degree (or equivalent) in Electrical or Computer Engineering.
• Proficiency in HDL design languages (Verilog/VHDL).
• Strong knowledge of UNIX/Linux and scripting (TCL, cshell, Perl).
• Solid understanding of ASIC design; ATE test experience is a plus.
• Excellent problem-solving skills and a strong team player with good communication abilities.

If you're ready to take the next step in your career, please comment or DM for more information

📩 Email: gony.huynh@talentjdi.com

📞 Zalo: 0776635766