Senior Verification Engineer - AI Chip Infrastructure

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AI Summary

Join a leading European semiconductor company developing cutting-edge AI chip infrastructure. As a Senior Verification Engineer, you will ensure the correctness and functionality of complex digital designs at the Register Transfer Level using advanced verification methodologies. This role requires a Master or PhD, 8+ years of industrial experience, and proficiency in SystemVerilog and UVM.

Key Highlights
Work on next-generation AI hardware in a small, highly skilled team of 147 people.
Permanent, full-time onsite role in Barcelona, Spain with flexible working hours.
Relocation package for you and your family including visa, flight, first month rent, and housing assistance.
Key Responsibilities
Ensure the correctness and functionality of complex digital designs at the Register Transfer Level according to the specification.
Use advanced verification methodologies and tools to validate the designs.
Technical Skills Required
SystemVerilog UVM Python Perl Bash TCL Git SVN
Benefits & Perks
Relocation package for you and your family (visa, flight, first month rent, housing assistance)
Permanent, full-time onsite role in Barcelona, Spain
Flexible working hours (9–6, Monday to Friday)
Candies, coffee, and free Spanish lessons

Job Description


AUTSORSA is a fast-growing company founded and based in Bulgaria that serves clients from all over the world, providing business outsourcing, outstaffing and HR services.

Our client is a leading European semiconductor company developing cutting-edge AI chip infrastructure. They are at the forefront of memory subsystem design and high-performance computing, creating innovative solutions that power the next generation of AI processors.


We are looking for a Verification Engineer to join a highly skilled team developing next-generation AI hardware.


Are you passionate about microprocessor architecture? We need you! As a Senior Verification Engineer, you will work within the Verification Team and play a crucial role in ensuring the correctness and functionality of complex digital designs at the Register Transfer Level according to the specification, using advanced verification methodologies and tools to validate the designs.


Requirements:

  • Master or PhD
  • English C1
  • Industrial experience +8 years
  • Proficiency in SystemVerilog and UVM
  • Knowledge of scripting languages (Python, Perl, Bash, TCL) and regression tools
  • Experience with simulation and simulation tools
  • Knowledge of revision control methodology and tools (git, svn)
  • Experience in block level and sub-system or top level verification
  • Experience with formal and dynamic verification
  • Strong problem-solving skills and attention to detail
  • Excellent communication and teamwork abilities


Why join us:

  • Relocation package for you and your family (visa, flight, first month rent, housing assistance).
  • Permanent, full-time onsite role in Barcelona, Spain.
  • Flexible working hours (9–6, Monday to Friday).
  • Work in one of the very few companies in Europe building AI chip infrastructure.
  • Small, highly skilled team (147 people) with opportunities for learning and growth.
  • Supportive, family-friendly environment with strong relocation assistance.
  • Candies, coffee, and free Spanish lessons included! 🇪🇸


How to Apply

Send us your CV!

By applying to this advertisement, you voluntarily provide your personal data and consent to their processing for the purposes of recruitment. The processing of your personal data is carried out in full compliance with the requirements of Regulation (EU) 2016/679 (General Data Protection Regulation), the Personal Data Protection Act, and all other applicable regulations.

License for the selection of personnel from the Employment Agency No. 3484 of 08.03.2023 and No. 3485 of 08.03.2023 for the EU.


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