Senior Wireless Engineer

We are a deep-tech startup for the breakthrough development of a new non-cellular 5G wireless microchip. Massive IoT describes a future in which billions or even trillions of smart devices are connected together. While this is still a dream today, the DECT NR+ microchip developed by Last Mile Semiconductor is a technical prerequisite for making this vision a reality.

A unique opportunity awaits you to join our Dresden-based startup for groundbreaking new non-cellular 5G wireless microchip development.

YOUR TASKS

We are looking for a qualified Wireless System Engineer to work on the new DECT NR+ ETSI standard (named also DECT-2020) and its implementation into a cutting-edge System-on-Chip ASIC. You will be part of a dynamic engineering team engaged in the design, testing and fabrication.

• You will be responsible for the radio transceiver, and its interfaces in the System-on-Chip (SoC)
• Implementing signal processing algorithms in Matlab, taking into account design trade-offs and optimizations in terms of performance, complexity and power consumption
• Developing link-level and system-level simulations of the radio system (specifically PHY / L1, optionally MAC / L2 layers)
• Collaborating with Digital Design, and Firmware teams: provide support for fixed-point design, pre- and post-silicon verification in the product development
• Collaborating with RF IC teams: design and validate the SoC architecture, and its analog subsystems
• Being an active member of the start-up, and contribute to its modern working culture
• Working in an international growing team (good English skills are required)

TOOLS, TECHNOLOGIES AND REQUIREMENTS

The ideal candidate must have experience in some of the following areas:

Programming languages:

• Matlab for algorithm design, integration and verification (optionally also: Python, C, and C++)

Wireless communication systems:

• (OFDM/MIMO etc.) and existing telecommunication software stacks
• e.g., Cellular 4/5G, WiFi IEEE 802.11, WiMax etc…

Deep understanding of communication and signal processing theory in some of the following areas:

• modern Transmitter and Receiver architectures
• resampling, filtering, equalization, DPD, digital front-end, tracking systems, timing recovery, PLL, parameter estimation, channel modelling and estimation, fast automatic-gain-control (AGC), turbo code, LLR etc.)

Optionally, the ideal candidate has also experience in some of the following areas:

• wireless ASIC/FPGA development and realization (pre-silicon, tape-out, post-silicon)
• Defining interfaces between software/firmware and hardware (ASIC), i.e., “HW/SW split”
• Analog front-end simulation e.g. Digital-to-Analog Converter (DAC), Analog-to-Digital Converter (ADC), LNA, PA, phase noise, IQ imbalance, fast analog AGC etc.

WE OFFER

• Permanent position with a high level of personal responsibility and excellent development opportunities
• Work in an international, friendly and motivated team, which will be happy to support you in all questions
• Extensive relocation support (finding accommodation, insurance, registration) and a €500 relocation bonus for employees from abroad
• Flat hierarchies, we are open to change and welcome your ideas
• An appreciative corporate culture characterised by a high degree of team spirit and trust, regular team events
• Flexible and family-friendly working environment
• Attractive benefits: free job or Germany ticket or job bike (monthly allowance of € 55) + free use of the gym in the building
• Bright and comfortable offices in a central Dresden location (Plauen)
• Fast and uncomplicated 2-step application process