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Senior Digital Design Engineer - ASIC/FPGA, RISC-V & PCIe
Visa Sponsorship
Relocation
AI Summary
Lead advanced digital IC design for cutting-edge semiconductor technology nodes. Develop RISC-V CPU architectures, PCIe protocols, and machine learning accelerators. Work with SystemVerilog, UVM, and scripting for ASIC/FPGA projects.
Key Highlights
5+ years in ASIC/FPGA design with advanced technology nodes
Experience with RISC-V CPU architecture and PCIe protocols
UVM environments, SystemVerilog, and scripting (C/C++, Python)
Key Responsibilities
Design and develop advanced digital ICs for semiconductor technology nodes
Contribute to RISC-V CPU architecture and PCIe protocol implementations
Develop and verify ASIC/FPGA designs using SystemVerilog and UVM environments
Collaborate on machine learning accelerator designs
Write and maintain scripting (C/C++, Python) for design automation and verification
Technical Skills Required
Nice to Have
RISC-V knowledge
PCIe protocol expertise
GPU architecture familiarity
Job Description
An exciting opportunity to work on the latest cutting edge technology in the semiconductor industry.
In this new role as senior digital design engineer you will have the opportunity to contribute to advanced technology nodes, consisting of RISC-V designs, CPU architecture, PCIe protocols and machine learning.
I am looking to speak with senior digital design engineers – who have experience of, or an interest in:
- Degree in Electronics / Microelectronics or similar field
- 5+ years’ experience in ASIC / FPGA design projects
- UVM environments & processes
- System Verilog for IP / SOC design of digital ICs / ASIC IP or chips
- Complex ASIC/FPGA designs & architecture for advanced technology nodes
- RISC-V / CPU / GPU knowledge (is a bonus, but not required)
- PCIe knowledge (also a bonus skill)
- scripting / coding skills – C/C++, python etc
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For more information on this role then please contact Jordan Browne at IC Resources.
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